This invention relates to thin film transistors, thin film transistor arrays and to a method of preparing the same.
It has been known heretofore to utilize thin film transistors and particularly an array of thin film transistors to control and drive display panels such as, for example, liquid crystal displays, electroluminescent mediums, and the like. Thin film transistors in this application offer an attractive substitute to the utilization of silicon technology because of the size limitation problems associated with that technology. A large number of thin film transistors can be prepared within any given size area in a density satisfactory for pictorial presentation. Examples of thin film transistors and associated display panels are set forth in U.S. Pat. Nos. 4,040,073 and 4,042,854.
Fabrication of thin film transistor arrays requires the generation of well-defined geometric patterns of metals, semiconductors and insulators. These are deposited in layers to form the transistor structures and circuit interconnections. Patterns can be generated by shadow masking or photolithographic methods. The first, a popular classic method, relies on a series of mechanical masks to define pattern geometries while shielding the remainder of the substrate from the deposition source. The photolithographic method is attractive for cost effective fabrication of large area circuits containing a high density of components.
It is known by those working in the field of thin film transistors that devices having more suitable characteristics are prepared when the interfaces between the various layers of the thin film transistors are prepared in a single vacuum pump-down. This is especially true of the layers which form the interface with the semiconductive layer of the thin film transistor. It is thought that the reason for this is that a freshly prepared clean surface, when forming the interface with the semiconductive layer, is desirable without being initially subjected to ambient conditions which may result in impurities or some form of degradation occurring to the surface structure. Thus, it is impossible to achieve a thin film transistor by the single pump-down technique where photolithographic techniques are employed in the fabrication of the layers next adjacent to the semiconductive layer. In the past, single pump-down techniques have been employed wherein a multiple number of shadow masks are employed within the vacuum system in order to deposit the proper shape of the different components of the thin film transistor during the single pump-down. This creates many problems because the multiple use of shadow masks has built-in limitations such as high initial capital expenditure, low ultimate panel size, and low resolution of the product, for example. Further, when one shadow mask is moved out of position between the substrate and the source of the material being deposited and a second moved in place, a registration problem employing very close tolerances is present. When it is considered that in a thin film transistor array at least 2500 thin film tansistors are prepared per square inch of area, this registration problem is thereby greatly magnified.
It is therefore an object of this invention to provide a method of preparing thin film transistor arrays wherein the various layers are fabricated by a single pump-down technique without the use of multiple shadow mask steps.